Resolves as YES if there is strong evidence that a hardware‑led intelligence explosion occurs before January 1st 2040, in the sense that at least one contiguous 5‑year period between market creation and that date clearly satisfies the conditions below.

For this market, a hardware intelligence explosion (HIE) means that, over some 5‑year window:

1. Large hardware‑driven jumps in effective compute

• For broadly capable, frontier AI systems, improvements in chips, interconnects, memory, packaging, and chip supply yield at least ~two orders of magnitude (≥100×) increase in effective compute per dollar (or per joule) over the window.

• This improvement should be primarily attributable to hardware and deployment (better accelerators, denser and more efficient datacenters, much cheaper or more abundant AI‑grade chips), after controlling for algorithmic progress and model/training tricks.

• “Effective compute” should be understood in the usual retrospective sense: how much training or inference compute would have been required at the start of the window, given contemporary software, to reach the same capability level.

2. AI‑automated chip R&D and/or production at scale

By the later part of the window, AI systems carry out a large majority of the cognitive labor in at least one of:

• Chip architecture and micro‑architecture design (e.g. designing new AI accelerators, memory hierarchies, interconnect topologies).

• Electronic design automation (EDA): floorplanning, placement, routing, verification, timing closure, etc.

• Process development and fab optimisation: exploring process recipes, yield improvement, tool scheduling, and other high‑leverage engineering tasks.

• Strategic planning of chip manufacturing and datacenter build‑out (e.g. automated capacity planning that feeds directly into hardware roadmaps).

Humans still set high‑level goals, safety constraints, and business strategy, but a majority (roughly ≥50–80%) of the effective “brainpower” in the relevant chip R&D / production‑planning workflows at leading firms comes from AI systems rather than human engineers.

3. A recognisable hardware‑centric feedback loop

There is clear evidence of a positive feedback cycle of the form:

AI systems substantially accelerate chip technology and/or chip production →
those improved chips (or massively increased chip supply) are quickly used to train more powerful AI systems →
those more powerful AI systems further accelerate subsequent chip R&D or production, and so on.

The loop:

• Need not be purely hardware‑only; software advances and AI‑R&D automation can be happening in parallel.

• Must, however, be recognisable as an independent driver of accelerating AI progress — not just “chips improved in the background while software breakthroughs did all the work.”

4. Frontier‑level impact, not a niche phenomenon

• The HIE should concern hardware underpinning frontier, general‑purpose AI (e.g. accelerators used for large‑scale training and major deployments), not just a narrow embedded or edge‑device niche.

• The feedback loop should visibly shift the overall trajectory of:

  • the cost of training / running frontier systems, and/or

  • the rate at which new frontier models can be trained and deployed,
    rather than being a minor curiosity in an otherwise business‑as‑usual hardware trend.

Evidence the resolver should look for in a YES world

By early 2040, this market should resolve YES if a reasonable, well‑informed observer would agree that at least one 5‑year window before 2040 clearly meets the conditions above. Relevant kinds of evidence include (several should be present, though not all are strictly required):

• Quantitative decompositions of AI progress that explicitly separate software and hardware contributions and identify a 5‑year span with ≥100× gains in effective compute primarily due to hardware changes (better chips, denser datacenters, large‑scale automated chip manufacturing), rather than algorithmic improvements.

• Industry reports or academic work documenting that AI systems are performing most core chip‑R&D / EDA / process‑engineering tasks at major semiconductor or AI‑hardware firms, with humans mainly supervising, steering, or doing governance and safety work.

• Widely adopted terminology among experts and institutions describing a period as a “hardware intelligence explosion”, “runaway AI‑driven chip boom”, “hardware‑led takeoff”, or a close synonym, backed by quantitative indicators rather than mere hype.

• Case studies of stacked hardware generations where:

  • AI‑designed (or AI‑managed) hardware generations are credited with large jumps in performance/cost for frontier AI, and

  • those jumps are in turn credited with enabling the rapid training or deployment of more capable AI systems that go on to design / manage the next hardware generation in short cycles.

If several windows are plausible, the resolver should evaluate the most favourable contiguous 5‑year span (e.g. 2030–2035 rather than 2031–2036).

Examples that should not count as YES

This market should resolve NO if, by early 2040, best available evidence indicates that no 5‑year period between market creation and January 1st 2040 satisfies the conditions above. Non‑qualifying scenarios include (non‑exhaustive):

• Plain scaling without an AI‑driven hardware loop
  AI chips get cheaper and faster, and global AI compute deployment grows rapidly, but this looks like a continuation of historical trends driven by human engineers, capital expenditure, and incremental process improvements — with AI tools playing only a modest, assistive role in chip design and manufacturing.

• Software‑dominated explosions
  There is a clear intelligence explosion driven primarily by software (e.g. new architectures, training methods, scaffolding, and AI‑automated AI R&D), while hardware continues improving at roughly its pre‑existing pace. Even if overall effective compute soars, if careful analyses attribute most of the acceleration to software and spending rather than hardware‑side AI feedback loops, this market should resolve NO.

• Narrow or local hardware booms
  AI‑assisted design produces spectacular gains for a narrow class of chips (say, a specialised accelerator for one application, or one company’s internal process), but:

  • the effect on total effective compute for frontier AI is modest, or

  • there is no clear ongoing feedback loop where AI‑driven hardware improvements quickly enable further AI advances which then feed back into hardware.

• Ambiguous or weak attribution
  Even if AI capabilities and chip metrics both improve quickly, if it remains unclear whether AI‑driven chip‑tech / chip‑production feedback loops were a major causal driver — as opposed to hardware and software both improving for largely independent reasons — the default should be to not stretch the definition of HIE and to resolve NO.

Timing and resolution notes

• The “5‑year window” means any continuous period of exactly five years whose start and end dates are both before January 1st 2040, and whose start date is on or after the market’s creation date. Examples: 2026‑01‑01 to 2031‑01‑01, 2028‑07‑01 to 2033‑07‑01, 2035‑01‑01 to 2040‑01‑01.

• The market creator (or designated resolver) should make a good‑faith judgment based on the totality of public evidence available at resolution time, including retrospective measurement projects, lab retrospectives, industry whitepapers, and academic analyses.

• The market may resolve early to YES if, prior to 2040, there is broad expert recognition that a hardware intelligence explosion (as defined above) has already taken place and enough evidence is available. Otherwise, it should resolve only after a reasonable delay past January 1st 2040, once robust retrospective analyses of the late‑2030s are accessible.

• In close or borderline cases, the resolver should err on the side of NOT calling a hardware intelligence explosion unless the hardware‑driven feedback loop and its multi‑order‑of‑magnitude impact are clearly documented.